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Previous: <a href="Basic-PowerPC-Built_002din-Functions-Available-on-ISA-3_002e0.html#Basic-PowerPC-Built_002din-Functions-Available-on-ISA-3_002e0" accesskey="p" rel="prev">Basic PowerPC Built-in Functions Available on ISA 3.0</a>, Up: <a href="Basic-PowerPC-Built_002din-Functions.html#Basic-PowerPC-Built_002din-Functions" accesskey="u" rel="up">Basic PowerPC Built-in Functions</a> &nbsp; [<a href="index.html#SEC_Contents" title="Table of contents" rel="contents">Contents</a>][<a href="Indices.html#Indices" title="Index" rel="index">Index</a>]</p>
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<hr>
<a name="Basic-PowerPC-Built_002din-Functions-Available-on-ISA-3_002e1-1"></a>
<h4 class="subsubsection">6.60.22.6 Basic PowerPC Built-in Functions Available on ISA 3.1</h4>

<p>The basic built-in functions described in this section are
available on the PowerPC family of processors starting with ISA 3.1.
Unless specific options are explicitly disabled on the
command line, specifying option <samp>-mcpu=power10</samp> has the effect of
enabling all the same options as for <samp>-mcpu=power9</samp>.
</p>
<p>The following built-in functions are available on Linux 64-bit systems
that use a future architecture instruction set (<samp>-mcpu=power10</samp>):
</p>
<dl>
<dt><a name="index-_005f_005fbuiltin_005fcfuged"></a>Built-in Function: <em>unsigned long long</em> <strong>__builtin_cfuged</strong> <em>(unsigned long long, unsigned long long)</em></dt>
<dd><p>Perform a 64-bit centrifuge operation, as if implemented by the
<code>cfuged</code> instruction.
</p></dd></dl>

<dl>
<dt><a name="index-_005f_005fbuiltin_005fcntlzdm"></a>Built-in Function: <em>unsigned long long</em> <strong>__builtin_cntlzdm</strong> <em>(unsigned long long, unsigned long long)</em></dt>
<dd><p>Perform a 64-bit count leading zeros operation under mask, as if
implemented by the <code>cntlzdm</code> instruction.
</p></dd></dl>

<dl>
<dt><a name="index-_005f_005fbuiltin_005fcnttzdm"></a>Built-in Function: <em>unsigned long long</em> <strong>__builtin_cnttzdm</strong> <em>(unsigned long long, unsigned long long)</em></dt>
<dd><p>Perform a 64-bit count trailing zeros operation under mask, as if
implemented by the <code>cnttzdm</code> instruction.
</p></dd></dl>

<dl>
<dt><a name="index-_005f_005fbuiltin_005fpdepd"></a>Built-in Function: <em>unsigned long long</em> <strong>__builtin_pdepd</strong> <em>(unsigned long long, unsigned long long)</em></dt>
<dd><p>Perform a 64-bit parallel bits deposit operation, as if implemented by the
<code>pdepd</code> instruction.
</p></dd></dl>

<dl>
<dt><a name="index-_005f_005fbuiltin_005fpextd"></a>Built-in Function: <em>unsigned long long</em> <strong>__builtin_pextd</strong> <em>(unsigned long long, unsigned long long)</em></dt>
<dd><p>Perform a 64-bit parallel bits extract operation, as if implemented by the
<code>pextd</code> instruction.
</p></dd></dl>

<dl>
<dt><a name="index-vsx_005fxl_005fsext"></a>Built-in Function: <em>vector signed __int128</em> <strong>vsx_xl_sext</strong> <em>(signed long long, signed char *)</em></dt>
<dt><a name="index-vsx_005fxl_005fsext-1"></a>Built-in Function: <em>vector signed __int128</em> <strong>vsx_xl_sext</strong> <em>(signed long long, signed short *)</em></dt>
<dt><a name="index-vsx_005fxl_005fsext-2"></a>Built-in Function: <em>vector signed __int128</em> <strong>vsx_xl_sext</strong> <em>(signed long long, signed int *)</em></dt>
<dt><a name="index-vsx_005fxl_005fsext-3"></a>Built-in Function: <em>vector signed __int128</em> <strong>vsx_xl_sext</strong> <em>(signed long long, signed long long *)</em></dt>
<dt><a name="index-vsx_005fxl_005fzext"></a>Built-in Function: <em>vector unsigned __int128</em> <strong>vsx_xl_zext</strong> <em>(signed long long, unsigned char *)</em></dt>
<dt><a name="index-vsx_005fxl_005fzext-1"></a>Built-in Function: <em>vector unsigned __int128</em> <strong>vsx_xl_zext</strong> <em>(signed long long, unsigned short *)</em></dt>
<dt><a name="index-vsx_005fxl_005fzext-2"></a>Built-in Function: <em>vector unsigned __int128</em> <strong>vsx_xl_zext</strong> <em>(signed long long, unsigned int *)</em></dt>
<dt><a name="index-vsx_005fxl_005fzext-3"></a>Built-in Function: <em>vector unsigned __int128</em> <strong>vsx_xl_zext</strong> <em>(signed long long, unsigned long long *)</em></dt>
<dd>
<p>Load (and sign extend) to an __int128 vector, as if implemented by the ISA 3.1
<code>lxvrbx</code>, <code>lxvrhx</code>, <code>lxvrwx</code>, and  <code>lxvrdx</code>
instructions.
</p></dd></dl>

<dl>
<dt><a name="index-vec_005fxst_005ftrunc"></a>Built-in Function: <em>void</em> <strong>vec_xst_trunc</strong> <em>(vector signed __int128, signed long long, signed char *)</em></dt>
<dt><a name="index-vec_005fxst_005ftrunc-1"></a>Built-in Function: <em>void</em> <strong>vec_xst_trunc</strong> <em>(vector signed __int128, signed long long, signed short *)</em></dt>
<dt><a name="index-vec_005fxst_005ftrunc-2"></a>Built-in Function: <em>void</em> <strong>vec_xst_trunc</strong> <em>(vector signed __int128, signed long long, signed int *)</em></dt>
<dt><a name="index-vec_005fxst_005ftrunc-3"></a>Built-in Function: <em>void</em> <strong>vec_xst_trunc</strong> <em>(vector signed __int128, signed long long, signed long long *)</em></dt>
<dt><a name="index-vec_005fxst_005ftrunc-4"></a>Built-in Function: <em>void</em> <strong>vec_xst_trunc</strong> <em>(vector unsigned __int128, signed long long, unsigned char *)</em></dt>
<dt><a name="index-vec_005fxst_005ftrunc-5"></a>Built-in Function: <em>void</em> <strong>vec_xst_trunc</strong> <em>(vector unsigned __int128, signed long long, unsigned short *)</em></dt>
<dt><a name="index-vec_005fxst_005ftrunc-6"></a>Built-in Function: <em>void</em> <strong>vec_xst_trunc</strong> <em>(vector unsigned __int128, signed long long, unsigned int *)</em></dt>
<dt><a name="index-vec_005fxst_005ftrunc-7"></a>Built-in Function: <em>void</em> <strong>vec_xst_trunc</strong> <em>(vector unsigned __int128, signed long long, unsigned long long *)</em></dt>
<dd>
<p>Truncate and store the rightmost element of a vector, as if implemented by the
ISA 3.1 <code>stxvrbx</code>, <code>stxvrhx</code>, <code>stxvrwx</code>, and <code>stxvrdx</code>
instructions.
</p></dd></dl>

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